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Advances in Computer Systems Architecture [electronic resource] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / edited by Amos Omondi, Stanislav Sedukhin.

Publication:
Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2003.
Format/Description:
Book
1 online resource (XIV, 410 pages)
Edition:
1st ed. 2003.
Series:
Computer Science (Springer-11645)
Lecture notes in computer science 0302-9743 ; 2823
Lecture Notes in Computer Science, 0302-9743 ; 2823
Contained In:
Springer eBooks
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Subjects:
Computer architecture.
Logic design.
Computer arithmetic and logic units.
Computer input-output equipment.
Microprocessors.
Computer networks.
Local subjects:
Computer System Implementation. (search)
Logic Design. (search)
Arithmetic and Logic Structures. (search)
Input/Output and Data Communications. (search)
Processor Architectures. (search)
Computer Communication Networks. (search)
System Details:
text file PDF
Summary:
This conference marked the ?rst time that the Asia-Paci?c Computer Systems Architecture Conference was held outside Australasia (i. e. Australia and New Zealand), and was, we hope, the start of what will be a regular event. The conference started in 1992 as a workshop for computer architects in Australia and subsequently developed into a full-?edged conference covering Austra- sia. Two additional major changes led to the present conference. The ?rst was a change from "computer architecture" to "computer systems architecture", a change that recognized the importance and close relationship to computer arc- tecture of certain levels of software (e. g. operating systems and compilers) and of other areas (e. g. computer networks). The second change, which re?ected the increasing number of papers being submitted from Asia, was the replacement of "Australasia" with "Asia-Paci?c". This year's event was therefore particularly signi?cant, in that it marked the beginning of a truly "Asia-Paci?c" conference. It is intended that in the future the conference venue will alternate between Asia and Australia/New Zealand and, although still small, we hope that in time the conference will develop into a major one that represents Asia to the same - tent as existing major computer-architecture conferences in North America and Europe represent those regions.
Contents:
How Can the Earth Simulator Impact on Human Activities
Toward Architecting and Designing Novel Computers
Designing Ultra-large Instruction Issue Windows
Multi-threaded Microprocessors - Evolution or Revolution
The Development of System Software for Parallel Supercomputers
Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA
Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research
Design and Implementation of Java Processors
MOOSS: CPU Architecture with Memory Protection and Support for OOP
Reducing Access Count to Register-Files through Operand Reuse
SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator
Towards an Asynchronous MIPS Processor
On Implementing High Level Concurrency in Java
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
A Novel Architecture for Genomic Sequence Searching and Alignment
A Reconfigurable Multi-threaded Architecture Model
Reconfigurable Instruction-Level Parallel Processor Architecture
Mapping Applications to a Coarse Grain Reconfigurable System
Packing with Boundary Constraints for a Reconfigurable Operating System
Arithmetic Circuits Combining Residue and Signed-Digit Representations
A New On-the-fly Summation Algorithm
State Reordering for Low Power Combinational Logic
User-Level Management of Kernel Memory
Variable Radix Page Table: A Page Table for Modern Architectures
L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy
Legba: Fast Hardware Support for Fine-Grained Protection
Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem
Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor
Performance of the Achilles Router
Latency Improvement in Virtual Multicasting
A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks.
Contributor:
Omondi, Amos. editor., Editor,
Sedukhin, Stanislav. editor., Editor,
SpringerLink (Online service)
Other format:
Printed edition:
Printed edition:
ISBN:
978-3-540-39864-6
9783540398646
Publisher Number:
10.1007/13479 doi
Access Restriction:
Restricted for use by site license.